2009: in February, Samsung validated 40 nm DRAM chips, considered a 'significant step' towards DDR4 development since in 2009, DRAM chips were only beginning to migrate to a 50 nm process.DDR4 was described as involving a 30 nm process at 1.2 volts, with bus frequencies of 2133 MT/s 'regular' speed and 3200 MT/s 'enthusiast' speed, and reaching market in 2012, before transitioning to 1 volt in 2013. 2007: some advance information was published in 2007, and a guest speaker from Qimonda provided further public details in a presentation at the August 2008 San FranciscoIntel Developer Forum (IDF). The high-level architecture of DDR4 was planned for completion in 2008. 2005: standards body JEDEC began working on a successor to DDR3 around 2005, about 2 years before the launch of DDR3 in 2007.
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